As integrated chips continue to decrease in size, limitations in processing capabilities and in fundamental material characteristics have made scaling of planar CMOS transistors increasingly difficult (e.g., due to leakage current and process variations). FinFET (Field effect transistors) devices have long been looked to as a promising alternative to planar CMOS transistors. In recent years, advances in processing technology have made FinFET devices a viable option in emerging technology nodes (e.g., 22 nm and below).
FinFET devices are three-dimensional structures that have a conductive channel region comprising a fin of semiconductor material that rises above a substrate as a three-dimensional structure. A gate structure, configured to control the flow of charge carriers within the conductive channel region, wraps around the fin of semiconductor material. For example, in a tri-gate FinFET structure, the gate structure wraps around three sides of a fin of semiconductor material, thereby forming conductive channel regions on three sides of the fin.